Lecture Notes For All: HARDWARE DESIGN OF DSP PROCESSORS IN FPGA.

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Sunday, May 15, 2011

HARDWARE DESIGN OF DSP PROCESSORS IN FPGA.

HARDWARE DESIGN OF DSP PROCESSORS IN FPGA.

 

  1. ELG6163_Introduction.ppt Introduction to class by M. Bolic.
  2. Rappaport et al. Invited article about "Wireless Communications: Past Events and a Future Perspective. in PDF. Cellular/PCS technologies. Indoor access. Multiple access. Code Division Multiple Access, CDMA. CDMA Challenges. Wireless Data Rates. Orthogonal Frequency Division Multiplexing (OFDM) amd Multicarrier Communications. Ultra Wideband (UWB). Space Time Processing. Ad Hoc Networking. Network Optimization. Challenges to cross layer optimization.
  3. Improved Headphone Soung Stage. Slides in PPT.
  4. Part 2. Improved Headphone Soung Stage. Slides in PPT.
  5. 3G and 4G Wireless. Advances and Challenges. Slides in PPT. Where are we? Representative Wireless Standards. TDMA. FDMA. CDMA. Multi-path arrival of signals. CDMA Rake Receiver. Orthogonal Frequency Division Multiplexing (OFDM). 3G services. Key mobility services. Customized Application for Mobile Enhanced Logic. GSM networks. GSM and GPRS. WCDMA/UMTS. 3G evolution. Some representative current wireless options. 3G WCDMA. Release 99. Release 4. Release 5. etc. ADVANCED TECHNICAL MATERIAL.
  6. Michael Quinn. Chapter15. Slides in PPT. Parallel programming in C. The Fast Fourier Transforms. Fourier Analysis. Discrete Fourier Transform. Fast Fourier Transform. Parallel Implementation.
  7. Programming Configurable Processors. Guccione paper in PDF.
  8. B. Nikolic. From Algorithms to Systems on a Chip in a Semester. Slides in PPT. Projects. Design Projects. OFDM receiver. SVD for multi-antenna. CDMA Baseband. RAKE Receiver. Polyphase filter bank. Adaptive Image-Reject Mixer. Adaptation via spectral estimation. Adaptation via LMS. 3G Turbo Decoder. SISO Block: SOVA Implementation. MAP implementation. High Speed Iterative Decoder. MAP decoder. LDPC Decoder. Maskless litography. Decoding for maskless litography.
  9. Altera DSP. Slides in PPT. Comparison between PDSP and FPGA. Virtex II Pro. Altera Stratix FPGA. Stratix DSP Block and its configuration. Altera Design Flow.
  10. ELG6163_Green.pdf TI standards for writing algorithms.
  11. ELG6163_Burton.pdf . Multiprocessor for DSP. Student report.
  12. ELG6163_Burton.ppt. Multiprocessor for DSP. Slides in PPT. Student report.
  13. ELG6163_Distributed_arithmetic.ppt Distributed Arithmetic. Sum of Products. DA Derivation. PDSP and Shift-add DA Architectures. Modified DA Solutions. DA with table partitioning.
  14. DSP1/ELG6163_FIR.pdf FIR Filters by M. Bolic. FIR Filter structures. Polyphase FIR filters. Parallel Polyphase FIR Filters. Decimated FIR. Implementation of FIR Filters.
  15. ELG6163_Implementation_of_FIR.ppt M. Bolic. Implementations of FIR Filters.
  16. ELG6163_IIR.pdf IIR Filters by M. Bolic, S.K. Mitra. Structures. Direct Form. Transposed Direct Form. Lattice-Ladder Form. Parallel Realization. Cascade Realization. Bi-Quad Coupled Realization. State Space Realization. Implementation.
  17. ELG6163_IIR_analysis_Guerra.ppt Cont. IIR Filters by M.Bolic.
  18. ELG6163_Longa.doc IP Core design. A literature survey. Student report.
  19. ELG6163_Longa.ppt IP Core design. A literature survey. Student report.
  20. ELG6163_PDSP.ppt M. Bolic. Architectural Analysis of a DSP Device, the Instruction Set and the Addressing Modes. FIR Filter on ADPS-21x. DPS requirements. Fast Multiply-Accumulates (Data Path). Extended Precision Accumulator Register (Data Path). Dual Operand Fetch (Memory). Circular Buffering (Addressin). Zero-Overhead Looping (Instruction Set). Analog Devices Architectures and Programming. SHARC. Blackfin. Performance Optimization.
  21. ELG6163_Rank.doc Spec-C, Handel-C, SystemC. A Comparative study. Student report.
  22. ELG6163_Rank.ppt Spec-C, Handel-C, SystemC. A Comparative study. Student report.
  23. ELG6163_Real_time.ppt M. Bolic. Real Time Signal Processing. Structural levels of processing. Properties and parameters of signal processing algorithms. Definitions of throughput, latency, concurrency.
  24. ELG6163_fft.ppt M. Bolic. FFT Introduction. Some FFT algorithms. FFT on PDSP. FFT floating to fixed-point conversion. Hardware implementation of FFT.
  25. ELG6163_fixed_point1.ppt M. Bolic. Fixed Point Design. Numeric representation. Simulation methods for floating to fixed point conversion. Analytical methods.
  26. FEED-2002_05Nov02_2.ppt Analog and digital techniques in closed loop regulation applications. Digital systems. Sampling of analog signals. Sample and hold. Pareval's theorem.
  27. JaehwanDefensePPT.pdf Hardware /software deadlock avoidance for multiprocessor multiresource system-on-a-chip. Slides from PHD Defense.
  28. L11-FourierProperties.ppt Fourier Transform. Properties and Examples. Basic functions. Fourier series representation of time functions. Fourier transform and its properties. Examples. Properties of FT: linearity and time shift. Differentiation. Convolution in the frequency domain.
  29. Future Wireless Communication Systems.
  30. NMRFamSzyperski.pdf G-Matrix Fourier Transform (GFT) Projection NMR Spectroscopy. Theory and application.

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